Power supply circuits are used in electronic devices, such as mobile phones and digital cameras, in which input power is converted to a certain output power. Examples of widely used power supply circuits include, for example, switching regulator (or DC-DC converter), which boast high efficiency and are amenable to size reduction. Using a switching regulator in an electronic device has, for example, the effect of reducing power consumption in the electronic device.
FIG. 12 is a diagram illustrating a configuration example of a switching regulator 200. The switching regulator 200 is supplied with an input voltage, through VIN, and outputs an output voltage, through VOUT, to a load 50. The switching regulator 200 can supply an output voltage VOUT such that no overvoltage occurs at the load 50, by converting the input voltage VIN to a constant voltage having a certain value. The load 50 is, for example, a resistor or an element that consumes power, such a CPU (Central Processing Unit) or the like.
The switching regulator 200 comprises a first and a second switching element 11, 12, a smoothing coil 13, a capacitor 14, a resistor 15, an I/V conversion circuit 16, a first comparator (PWM_COMP) 17, a logic unit 18, an error amplifier (inverting amplifier circuit) 19, a second comparator (PFM_COMP) 20, a clock generator circuit 21, an OR circuit 22, constant voltage sources 25, 26, a capacitor 27, resistors 28, 29, a reverse current detection comparator 30 and an input terminal 31. An integrating circuit 24 comprises the error amplifier 19, the constant voltage source 25 and the capacitor 27.
The switching regulator 200 receives the input of an external control signal (MODE) via the input terminal 31, and, based on this external control signal, operates in a forced PWM (Pulse Width Modulation) mode or a PFM (Pulse Frequency Modulation)/PWM automatic switching mode (hereafter, automatic switching mode). The forced PWM mode is a mode in which, for example, the switching regulator 200 outputs an output voltage VOUT at a given cycle (at a given duty ratio), regardless of the type of the load 50. The automatic switching mode is a mode in which, for example, the switching regulator 200 switches back and forth between PWM operation and PFM operation, in accordance with the type of the load 50, such that the switching regulator 200 operates in PFM when the load 50 is a light load, and in PWM when the load 50 is a heavy load. For example, the switching regulator 200 operates as a forced PWM mode upon input of “HIGH” as an external control signal, and operates as an automatic switching mode, upon input of “LOW”. The automatic switching mode can be realized, for example, by intercalating a pause period into a PWM operation (or forced PWM mode).
The operation of the switching regulator 200 in a forced PWM mode will be explained first, followed by an explanation on the operation in an automatic switching mode. FIG. 13A to FIG. 13C are diagrams illustrating waveform examples during a forced PWM mode. The forced PWM mode will be explained below with reference to these waveform diagrams.
In FIG. 12, the logic unit 18, for example, functions as a driving unit that switches on and off the first and second switching elements 11, 12, based on, for example, the output voltage at the first comparator 17.
For example, the logic unit 18 switches on the first switching element (or high-side MOS) 11 and switches off the second switching element (or low-side MOS) 12 when the output voltage of the first comparator 17 is “HIGH”. In this case, there is outputted an output voltage VOUT (output voltage VOUT on), of a certain voltage, for the input voltage VIN.
The logic unit 18 switches off the first switching element 11 and switches on the second switching element 12 when, for example, the output voltage of the first comparator 17 is “LOW”. In this case, no current flows in the first switching element 11, and hence the output voltage VOUT is off.
The first and second switching elements 11, 12 comprise, for example a pMOS and an nMOS, respectively.
The logic unit 18 switches off the second switching element upon switching on of the first switching element 11, and switches on the second switching element upon switching off of the first switching element 11. The logic unit 18 performs a mutually inverse switching operation on the first and second switching elements. By performing thus this switching operation on the first and second switching elements 11, 12, the logic unit 18 allows an output voltage VOUT of a certain voltage value to be generated, and outputted to the load 50, for the input voltage VIN.
Upon switching on of the first switching element 11, current flows in the resistor 15, and the I/V conversion circuit 16 converts that current to voltage. The I/V conversion circuit 16 outputs the converted voltage to the negative-side input of the first comparator 17. Herein, output voltage is supplied to the load 50 when the first switching element 11 is switched on, and hence a load current flows in the load 50. That is, an increase in the load current that flows in the load 50 entails an increase in the current flowing in the first switching element 11 and a rise in the output voltage of the I/V conversion circuit 16. Conversely, the output voltage of the I/V conversion circuit 16 drops when the load current decreases. Thus, a proportionality relationship exists between the load current and the output voltage of the I/V conversion circuit 16. The I/V conversion circuit 16 outputs, to the first comparator 17, a second signal in the form of an output voltage that is proportional to the load current.
The output voltage from the I/V conversion circuit 16 is inputted to the negative input side of the first comparator 17, while the output voltage of the error amplifier 19 is inputted to the positive input side of the first comparator 17, which decides the pulse width of the output voltage (or duty ratio) of the switching regulator 200. FIG. 13B and FIG. 13C are diagrams illustrating the relationship between the output voltage of the first comparator (PWM_COMP) 17 and the output voltage at a connection point LX between the two switching elements 11, 12. As described above, when the first comparator 17 outputs “HIGH”, the logic unit 18 switches on the first switching element 11, and when the first comparator 17 outputs “LOW”, the logic unit 18 switches off the first switching element 11. As a result, the first comparator 17 outputs a control signal that switches on or off the first and second switching elements 11, 12, through operation of the logic unit 18. The duty ratio of the output voltage VOUT is decided thereby.
Returning to FIG. 12, the error amplifier 19 is an inverting amplifier circuit that amplifies an error between the output voltage VOUT and a reference voltage Voref, and that outputs a first signal, indicating the amplified error, to the first comparator 17. The output voltage of the error amplifier 19 is considered next.
FIG. 13A is a diagram illustrating an example of the relationship between the output voltage of the error amplifier 19 and the output voltage of the I/V conversion circuit 16. When operating in a forced PWM mode, the switching regulator 200 outputs an output voltage VOUT at a constant duty ratio. Conceivably, however, the output voltage VOUT may drop below a certain voltage value (hereafter, first certain voltage value). The output voltage VOUT is inputted herein to the negative input side of the error amplifier 19, as a result of which there rises the output voltage of the error amplifier 19. When the output voltage of the error amplifier 19 rises, the voltage inputted to the positive input side of the first comparator 17 becomes greater than at a time before a drop in the output voltage VOUT, and hence the time of “HIGH” output becomes likewise longer than before. As a result, the time over which the logic unit 18 switches on the first switching element 11 becomes longer, and the output voltage VOUT rises. Conversely, when the output voltage VOUT is equal to or higher than the first certain voltage value, the switching regulator 200 operates so as to lower the output voltage VOUT, in order to allow supplying an output voltage VOUT at a constant duty ratio. An output voltage VOUT at a constant duty ratio can be preserved as a result of the foregoing. Ordinarily, an output voltage VOUT having a constant duty ratio is outputted when the output voltage of the I/V conversion circuit 16 and the output voltage of the error amplifier 19 are equal. The switching regulator 200 operates thus in a forced PWM mode as described above.
The automatic switching mode is explained next. FIG. 14A to FIG. 14D are diagrams illustrating waveform examples in various units during an automatic switching mode. The automatic switching mode is a mode in which a PWM operation and a PFM operation alternate each other. The PFM operation is performed by intercalating a pause period into a PWM operation.
When the load 50 is a heavy load, for example, the switching regulator 200 operates as a PWM mode, in the same way as in a forced PWM mode. For example, the output voltage of the I/V conversion circuit 16 drops gradually when the load current for the load 50 drops below a certain current value. In a PWM operation, the output voltage of the I/V conversion circuit 16 and the output voltage of the error amplifier 19 are equal. Therefore, the output voltage of the error amplifier 19 drops when the output voltage of the I/V conversion circuit 16 drops.
The output voltage of the error amplifier 19 is inputted to the second comparator 20. When the output voltage of the error amplifier 19 is equal to or lower than the negative input of the second comparator 20 (reference voltage is inputted), the output voltage (PFM_COMP output) of the second comparator 20 switches from “HIGH” to “LOW” (for example, FIG. 14B and FIG. 14C). At this time, “LOW” from the OR circuit 22 is inputted to the logic unit 18, the switching operation is discontinued, and a pause state is entered to. When in the pause state, the switching regulator 200 outputs charge stored in the capacitor 14 as the output voltage VOUT.
Thereafter, the charge stored in the capacitor 14 is outputted to the load 50, and the output voltage VOUT drops yet further. The output voltage of the error amplifier 19 rises then again through a drop in the output voltage VOUT that is inputted to the negative input side of the error amplifier 19. In the second comparator 20, the positive input (output voltage of the error amplifier 19) becomes thereafter equal to or greater than the negative input (reference voltage is inputted). The output voltage (PFM_COMP output) of the second comparator 20 turns then from “LOW” to “HIGH”; “HIGH” from the OR circuit 22 is inputted to the logic unit 18; and a PWM operation is carried out. During the automatic switching mode, the switching regulator 200 alternates between a pause state and a PWM operation (for example, FIG. 14C). By varying of the cycles of the pause period and the PWM operation period, and by varying the proportion therebetween, the switching regulator 200 is brought to a state in which the switching regulator 200 performs overall a PFM operation.
When the load 50 changes from a light load to a heavy load, the output voltage of the error amplifier 19 becomes equal to or higher than the negative input the second comparator 20, as a result of which the second comparator 20 outputs “HIGH” constantly. Accordingly, the logic unit 18 performs a switching operation, and the switching regulator 200 performs a PWM operation constantly. An operation example of an automatic switching mode has thus been described above.
In FIG. 12, the reverse current detection comparator 30 is a comparator that detects a reverse current of the coil current in coil 13 (the reverse current being a current flowing from the output voltage VOUT to GND via the coil 13 and the second switching element 12). The reverse current detection comparator 30 operates during the automatic switching mode. When a reverse current is detected by the reverse current detection comparator 30 (when the reverse current detection comparator 30 outputs “HIGH”) in a state where the second switching element 12 is switched on, the logic unit 18 switches off the second switching element 12, to prevent thereby the reverse current. In the switching regulator 200, thus, the power efficiency of the output voltage VOUT can be maintained at a certain efficiency or higher, during an automatic switching mode, through prevention, by the logic unit 18, of a reverse current of the coil current.
Non-patent document 1: A study of the slope compensation scheme of a current-mode DC-DC converter to obtain the input and output independent frequency characteristics, Chihiro KAWABATA and two others, Proceedings of the IEICE General Conference 2008, Electronics (2) 121, 2008-03-05
The problem of the switching regulator 200 is explained below. FIG. 15A to FIG. 15D are diagrams for explaining such problems.
In a PWM operation in an automatic switching mode, as described above, a drop of the load current to a certain current value or lower is accompanied by a drop in the output voltage of the I/V conversion circuit 16, and a drop of the output voltage of the error amplifier 19 to a second certain voltage value or lower. The negative input of the error amplifier 19 increases as a result (for example, FIG. 14A, FIG. 15B). The output voltage of the error amplifier 19 drops when the negative input of the error amplifier 19 becomes equal to or greater than the positive input (reference voltage Voref). The output voltage of the error amplifier 10 is inputted to the positive side of the second comparator 20, such that when the output voltage thereof becomes equal to or lower than the negative input (reference voltage), the second comparator 20 outputs “LOW” to the logic unit 18, and a pause state is entered.
In such a pause state in the automatic switching mode, the logic unit 18 performs a switch operation when “HIGH” (forced PWM mode) is inputted, as a external control signal, to the switching regulator 200. In this case, the negative-side input voltage of the error amplifier 19 becomes higher than the positive-side reference voltage Voref (for example, FIG. 15B). As a result, the switching regulator 200 incorrectly outputs an output voltage VOUT equal to or higher than the first certain voltage value. The negative-side input voltage in the error amplifier 19 is now higher than the positive-side reference voltage Voref, and the output voltage of the error amplifier 19 (positive-side input voltage of the first comparator 17) becomes equal to or lower than the negative input side voltage of the first comparator 17. The first comparator 17 causes the logic unit 18 to operate so as to shorten the on-time of the first switching element 11, to reduce the output voltage VOUT. As a result, the output voltage VOUT of the switching regulator 200 swings considerably to a negative voltage, as illustrated in FIG. 15D.
Thus, the output voltage fluctuates significantly when a forced PWM mode is inputted, as an external control signal, while the switching regulator 200 is in a pause state in an automatic switching mode.